Book Name: Switched-Capacitor Techniques for High-Accuracy Filter and ADC Design
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Switched-Capacitor Techniques for High-Accuracy Filter and ADC Design

E-book Particulars :
Language English
Pages 259
Format PDF
Measurement 9.07 MB

Switched-Capacitor Techniques for High-Accuracy Filter and ADC Design

Switched-Capacitor Techniques for High-Accuracy Filter and ADC Design by Patrick J. Quinn and Arthur H.M. Van Roermund | PDF Free Download.

Switched-Capacitor Techniques Contents

  • Chapter 1: Introduction
  • Chapter 2: Key Ideas for Correct SC Design
  • Chapter 3: SC Amplifier Design at Black-Field Stage
  • Chapter 4: Amplifier Architectures for SC Purposes
  • Chapter 5: Low-Sensitivity SC BPF Ideas
  • Chapter 6: High-Accuracy δ-QR SC BPF Design and Measurements
  • Chapter 7: ADC Design at Black-Field Stage
  • Chapter 8: Design Standards for Cyclic and Pipelined ADCs
  • Chapter 9: Capacitor Matching Insensitive Excessive-Decision Low-Energy ADC Idea
  • Chapter 10: High-Accuracy ADC Design and Measurements

Summary to Switched-Capacitor Techniques PDF

On this e book, switched-capacitor (SC) strategies are proposed which permit the attainment of upper intrinsic analog accuracies than beforehand potential in such software areas as an analogue filter and analog-to-digital converter (ADC) design.

The design philosophy is to create the required performance with out counting on trimming or digital calibration means however as a substitute to develop strategies which have decreased dependence on each part matching (particularly capacitor matching) and parasitic results (particularly parasitic capacitance).

At a system degree, orthogonal design procedures are employed which ensures that artifacts because of anticipated circuit imperfections are averted within the system switch perform.

As an illustration, in SC filter design, orthogonal-hardware-modulation helps alleviate the consequences of Npath mismatch via the introduction of an additional diploma of freedom, the place the variety of {hardware} paths N ({hardware} modulation) is decoupled from the useful modulation issue n, as launched by the transformation.

In algorithmic ADC design, each cyclic and pipelined, standard strategies make use of multiplying digital-to-analog converters (or MDACs) which require SC circuits with correct capacitor ratios to implement correct sign multiplication.

However, on this e book, the ADC perform is decomposed into the easy sub-functions of sign addition and degree shifting which could be applied utilizing SC strategies that don’t depend on correct capacitor ratios.

On the circuit degree, delta-charge circulation strategies are employed to appreciate SC circuits with extra correct transfers than their standard charge-transfer (QT) counterparts.

Not like QT SC circuits, SC circuits don’t require sign cost switch from the capacitor to the capacitor through the amplifier digital earth node. As a substitute, solely a delta cost flows within the digital earth node as a result of presence of parasitic capacitors on the amplifier enter terminals.

In SC filter design, delta-charge-redistribution is a method for the correct implementation of filter switch capabilities utilizing passive cost redistribution between capacitors within the suggestions path of an amplifier, as a substitute of energetic cost switch between capacitors via the energetic intervention of an amplifier in QT SC filters.

In ADC design, a extremely correct methodology (C+C) for the stacking of capacitor voltages is proposed which makes use of a floating-hold-buffer for implementation.

The accuracy of sign addition is virtually insensitive to the matching and linearity of the sign capacitors in addition to the presence of parasitic terminal capacitance.

Plenty of different modern circuit strategies have been included within the e book, comparable to a flexible correct track-and-hold (T&H) which is re-programmable for unipolar, bipolar, and differential modes clock-skew insensitive sampling; a common-mode-feedback circuit which considerably boosts the common-mode rejection ratio of single-ended amplifiers.

Excessive-efficiency dual-input transconductance amplifiers that make use of the extent shift properties of switched capacitors; a low-reference dynamic comparator.

The validity of the ideas developed and analyzed within the e book has been demonstrated in observe with the design of CMOS SC bandpass filters and algorithmic ADC phases (each cyclic and pipelined).

The intrinsic accuracies achieved transcend these achieved with earlier state-of-the-art options with a consequent discount in energy consumption for the identical velocity functions.

For instance, a 10.7MHz radio IF selectivity filter built-in into commonplace CMOS, using the proposed strategies, achieves an accuracy larger than ceramic filters.

One other instance is an ADC with higher than 12-bit intrinsic efficiency, albeit capacitors with solely 9-bits matching accuracy have been used within the realization.

The ADC structure can also be very strong and has confirmed itself in an embedded digital VLSI software within the very latest 65nm CMOS.

The ability consumptions and silicon areas of the options proposed listed here are decrease than different recognized options from the literature.

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